1. Field of the Invention
The present invention relates to the field of display technology, and in particular to an in-cell touch display panel.
2. The Related Arts
The rapid progress of the display technology makes touch display panels widely accepted and used by people. For example, smart phones and tablet computers are involved with the use of touch display panels. The touch display panel adopts embedding techniques to combine a touch panel and a liquid crystal display panel as a unity with the functionality of the touch panel embedded in the liquid crystal display panel so that the liquid crystal display panel possesses both functions of displaying and detecting touch inputs. The touch display panel can be classified as on-cell type, in-cell type, and externally-attached type according to the structure thereof. Among them, the in-cell type features the advantages of low cost, being ultra thin, and slim bezel and is majorly used in high-end touch products and is becoming the primary goal of future development of the touch control technology.
A liquid crystal display panel is generally composed of a color filter (CF) substrate, an thin-film transistor (TFT) array substrate, and a liquid crystal layer arranged between the two substrates and the operation principle thereof is that a drive voltage is applied to the two glass substrates to control the rotation of the liquid crystal molecules of the liquid crystal layer in order to refract out light from a backlight module for generating an image.
Low-temperature poly-silicon (LTPS) techniques are new generation technology for manufacturing TFTs. Compared to the traditional amorphous silicon (a-Si) technology, the LTPS displays have a relatively fast response speed and possess advantages such as high brightness, high definition, and low power consumption. Since the LTPS has an advantage of high mobility, the ratio of a channel with (W) to a channel length (L) of TFT substrate switch can be made extremely small in designing a pixel. This makes the aperture ratio of the pixel relatively high, providing an extremely high advantage in market competition.
Referring to FIG. 1, a cross-sectional view is given to illustrate the structure of a conventional in-cell touch display panel. The in-cell touch display panel comprises a TFT substrate 100, a CF substrate 200 that is opposite to the TFT substrate 100, and a liquid crystal layer 300 located between the TFT substrate 100 and the CF substrate 200.
The TFT substrate 100 comprises a first base plate 110, a light-shielding layer 120 arranged on the first base plate 110, a first insulation layer 130 arranged on the first base plate 110 and the light-shielding layer 120, a poly-silicon layer 410 arranged on the first insulation layer 130, a second insulation layer 420 arranged on the first insulation layer 130 and the poly-silicon layer 410, a gate electrode 430 arranged on the second insulation layer 420, a third insulation layer 440 arranged on the second insulation layer 420 and the gate electrode 430, source/drain electrodes 450 arranged on the third insulation layer 430, a first planarization layer 140 arranged on the third insulation layer 440 and the source/drain electrodes 450, a common electrode 150 arranged on the first planarization layer 140, a first passivation layer 160 arranged on the common electrode 150, a touch detection electrode layer 170 arranged on the first passivation layer 160, a second passivation layer 180 arranged on the first passivation layer 160 and the touch detection electrode layer 170, and a pixel electrode 190 arranged on the second passivation layer 180.
As shown in FIG. 2, the TFT substrate 100 further comprises a data line 510 arranged on the third insulation layer 440. The light-shielding layer 120 shields, in the horizontal direction, the poly-silicon layer 410, the gate electrode 430, and the source/drain electrodes 450 entirely and also partly shields the data line 510.
As shown in FIG. 3, the first planarization layer 140, the first passivation layer 160, and the second passivation layer 180 are respectively provided with a first via 141, a second via 161, and a third via 181 penetrating each other. The pixel electrode 190 is made in connection with the source/drain electrodes 450 through the first via 141, the second via 161, and the third via 181.
To connect the pixel electrode 190 to the source/drain electrodes 450, before the pixel electrode 190 is deposited, three holing operations must be respectively conducted in the first planarization layer 140, the first passivation layer 160, and the second passivation layer 180. This makes it necessary to take into consideration the influences caused by the variation of line width (critical dimension, CD) and overlaying, whereby the attempt to increase aperture ratio would be constrained. In addition, holing operations are some of the most complicated operations involved in a manufacturing process and this would greatly increase the difficulty of manufacturing and affecting product yield.